Makefiles automate rebuilding parts of a project by tracking file dependencies and timestamps
A Makefile consists of rules with targets, prerequisites, and tab-indented commands
Running make without arguments builds the first target by default
Targets rebuild only when their prerequisites are newer, avoiding unnecessary work
Variables (recursive or simply expanded) store lists, flags, and strings for reuse
Implicit rules handle common tasks like compiling C/C++ without explicit commands
Static pattern and pattern rules use % wildcards to generalize build steps
Automatic variables ($@, $<, $^, $?) simplify writing commands that refer to targets or dependencies
.PHONY marks non-file targets; .DELETE_ON_ERROR removes incomplete files on errors
Functions (foreach, filter, patsubst, call) support text processing and list transformations
Include, vpath, and recursive make enable modular and multi-directory project builds
A sample Makefile Cookbook shows how to assemble a medium-sized C/C++ build system
Get notified when new stories are published for "🇺🇸 Hacker News English"